Credit points: 15

Subject outline

This subject introduces programmable logic and VHDL. Students will be able to develop solutions to digital design problems using reliable synchronous digital design. A modular, reusable approach is encouraged. A strong emphasis is placed on demonstrated, working hardware implementations in the weekly laboratory sessions using a Xilinx FPGA and ISE software.

FacultyFaculty of Science, Tech & Engineering

Credit points15

Subject Co-ordinatorDarrell Elton

Available to Study Abroad StudentsYes

Subject year levelYear Level 2 - UG

Exchange StudentsYes

Subject particulars

Subject rules

Prerequisites ELE1IEL and (one of EMS1EP or ELE1EDP).


Incompatible subjectsN/A

Equivalent subjectsN/A

Special conditionsN/A

Learning resources


Resource TypeTitleResource RequirementAuthor and YearPublisher
ReadingsVHDL for Programmable logic,PrescribedSkahill, K.ADDISON-WESLEY, 1996.

Subject options

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Start date between: and    Key dates

Melbourne, 2014, Semester 2, Day


Online enrolmentYes

Maximum enrolment sizeN/A

Enrolment information

Subject Instance Co-ordinatorDarrell Elton

Class requirements

Laboratory Class Week: 31 - 43
One 4.0 hours laboratory class per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.

Lecture Week: 31 - 43
Two 1.0 hours lecture per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.


Assessment elementComments%
assignments (approx 500 words)In order to pass the unit students must obtain an overall pass grade, pass the examination and pass the practical work.10
laboratory work 1,500-word equivalent40
one 2-hour examination50