DIGITAL DESIGN WITH PROGRAMMABLE LOGIC

ELE2DDP

2021

Credit points: 15

Subject outline

This subject introduces programmable logic and VHDL. Students will be able to develop solutions to digital design problems using reliable synchronous digital design. A modular, reusable approach is encouraged. A strong emphasis is placed on the design and implementation of working hardware implementations on Field Programmable Gate Arrays (FPGAs) using a suite of Electronic Design Automation (EDA) software tools

SchoolEngineering and Mathematical Sciences

Credit points15

Subject Co-ordinatorDarrell Elton

Available to Study Abroad/Exchange StudentsYes

Subject year levelYear Level 2 - UG

Available as ElectiveNo

Learning ActivitiesN/A

Capstone subjectNo

Subject particulars

Subject rules

PrerequisitesELE1IEL AND (ELE1EDP OR EMS1EP)

Co-requisitesN/A

Incompatible subjectsN/A

Equivalent subjectsN/A

Quota Management StrategyN/A

Quota-conditions or rulesN/A

Special conditionsN/A

Minimum credit point requirementN/A

Assumed knowledgeN/A

Readings

FPGAs 101: Everything you need to know to get started

Resource TypeRecommended

Resource RequirementN/A

AuthorSmith, G

Year2010

Edition/VolumeN/A

PublisherNewnes

ISBNN/A

Chapter/article titleN/A

Chapter/issueN/A

URLN/A

Other descriptionN/A

Source locationN/A

Rapid prototyping of digital systems: SOPC Edition

Resource TypeRecommended

Resource RequirementN/A

AuthorHamblen, J, Hall T & Furman, M

Year2008

Edition/VolumeN/A

PublisherSpringer

ISBNN/A

Chapter/article titleN/A

Chapter/issueN/A

URLN/A

Other descriptionN/A

Source locationN/A

VHDL 101: Everything you need to know to get started

Resource TypeRecommended

Resource RequirementN/A

AuthorKafig W

Year2011

Edition/VolumeN/A

PublisherNewnes

ISBNN/A

Chapter/article titleN/A

Chapter/issueN/A

URLN/A

Other descriptionN/A

Source locationN/A

Circuit Design and Simulation with VHDL

Resource TypeRecommended

Resource RequirementN/A

AuthorPedroni, VA

Year2010

Edition/VolumeN/A

PublisherMIT Press

ISBNN/A

Chapter/article titleN/A

Chapter/issueN/A

URLN/A

Other descriptionN/A

Source locationN/A

Career Ready

Career-focusedNo

Work-based learningNo

Self sourced or Uni sourcedN/A

Entire subject or partial subjectN/A

Total hours/days requiredN/A

Location of WBL activity (region)N/A

WBL addtional requirementsN/A

Graduate capabilities & intended learning outcomes

Graduate Capabilities

Intended Learning Outcomes

01. Locate and identify relevant timing waveforms used to design VHDL Code in appropriate datasheets and web pages.
02. Design VHDL solutions to solve a variety of digital design problems including; random number generators, PWM and interfacing to external devices.
03. Develop hierarchical, reusable designs through use of components and generics.
04. Write solutions to VHDL and digital design problems in written form to communicate to a professional audience.

Subject options

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Start date between: and    Key dates

Melbourne (Bundoora), 2021, Semester 2, Day

Overview

Online enrolmentNo

Maximum enrolment sizeN/A

Subject Instance Co-ordinatorDarrell Elton

Class requirements

Laboratory Class Week: 30 - 42
One 3.00 h laboratory class per week on weekdays during the day from week 30 to week 42 and delivered via face-to-face.

Lecture Week: 30 - 42
One 2.00 h lecture per week on weekdays during the day from week 30 to week 42 and delivered via face-to-face.

Assessments

Assessment elementCommentsCategoryContributionHurdle% ILO*

3 assignments (approx 300 words each)

N/AN/AN/ANo10 SILO2, SILO4

Laboratory work 1,500-word equivalent

N/AN/AN/ANo40 SILO1, SILO2, SILO3

One 2-hour examination

N/AN/AN/ANo50 SILO2, SILO3