TEST AND VERIFICATION

ELE5TAV

Not currently offered

Credit points: 15

Subject outline

Test and verification techniques for modern integrated circuit and digital system design. Topics covered include: reliability and failure rates, reliability as affected by smaller dimensions and faster devices, thermal considerations. Redundancy and fault tolerance, functional and formal verification and fault modelling. Hardware/software co-design, co-verification and co-simulation. Timing and power analysis. Design for testability and ATPG and fault coverage tools, layout issues for testability. Testing methodologies: in-circuit, built in self test, boundary scan, memory testing, embedded system testing. Board-level interconnect testing. Test bench design.

School: Engineering and Mathematical Sciences (Pre 2022)

Credit points: 15

Subject Co-ordinator: James Whittington

Available to Study Abroad/Exchange Students: Yes

Subject year level: Year Level 5 - Masters

Available as Elective: No

Learning Activities: N/A

Capstone subject: No

Subject particulars

Subject rules

Prerequisites: ELE3DDE and ELE5ICD or ELE5DSD (and Subject Co-ordinator approval)

Co-requisites: N/A

Incompatible subjects: N/A

Equivalent subjects: ELE51TAV OR ELE52TAV

Quota Management Strategy: N/A

Quota-conditions or rules: N/A

Special conditions: N/A

Minimum credit point requirement: N/A

Assumed knowledge: N/A

Learning resources

Digital System Test and Testable Design: Using HDL Models and Architectures

Resource Type: Book

Resource Requirement: Recommended

Author: Navabi, Z

Year: 2010

Edition/Volume: N/A

Publisher: SPRINGER

ISBN: N/A

Chapter/article title: N/A

Chapter/issue: N/A

URL: N/A

Other description: N/A

Source location: N/A

Writing Testbenches: Functional Verification of HDL Models

Resource Type: Book

Resource Requirement: Recommended

Author: Bergeron, J

Year: 2003

Edition/Volume: 2ND ED

Publisher: KLUWER

ISBN: N/A

Chapter/article title: N/A

Chapter/issue: N/A

URL: N/A

Other description: N/A

Source location: N/A

Digital Circuit Testing and Testability

Resource Type: Book

Resource Requirement: Recommended

Author: Lala, P K

Year: 1997

Edition/Volume: N/A

Publisher: ACADEMIC PRESS

ISBN: N/A

Chapter/article title: N/A

Chapter/issue: N/A

URL: N/A

Other description: N/A

Source location: N/A

Hardware Design Verification: Simulation and Formal Method-Based Approaches

Resource Type: Book

Resource Requirement: Recommended

Author: Lam, W K

Year: 2005

Edition/Volume: N/A

Publisher: PRENTICE HALL

ISBN: N/A

Chapter/article title: N/A

Chapter/issue: N/A

URL: N/A

Other description: N/A

Source location: N/A

Career Ready

Career-focused: No

Work-based learning: No

Self sourced or Uni sourced: N/A

Entire subject or partial subject: N/A

Total hours/days required: N/A

Location of WBL activity (region): N/A

WBL addtional requirements: N/A

Graduate capabilities & intended learning outcomes

Graduate Capabilities

DISCIPLINE KNOWLEDGE AND SKILLS
INQUIRY AND ANALYSIS - Creativity and Innovation
INQUIRY AND ANALYSIS - Critical Thinking and Problem Solving
INQUIRY AND ANALYSIS - Research and Evidence-Based Inquiry

Intended Learning Outcomes

01. Identify effective test and verification procedures to minimise the faults introduced in the integrated circuit and digital system manufacturing process.
02. Create advanced simulation test benches to verify the design operation and compliance to the design specification.
03. Analyse and improve test benches to efficiently detect a digital system deficiencies and shorten the system development life cycle.
04. Design automated test benches for regression tests.
05. Design high level transaction based test benches.
06. Design module built-in self-test (BIST).
07. Optimise the automated test pattern generation (ATPG to maximise the fault coverage and minimise the test duration in the integrated circuit and digital system manufacturing process.
Subject not currently offered - Subject options not available.