ELECTRONIC DESIGN AUTOMATION - VHDL AND FPGAS

ELE5FDD

2018

Credit points: 15

Subject outline

The increasing complexity of digital systems has led to development of modern methodologies in digital design, simulation and production. Collectively known as electronic design automation (EDA), key elements include text and graphics-based design entry and verification, hardware description languages (HDLs), programmable logic devices (PLDs) and field programmable gate arrays (FPGAs). This subject introduces the hardware description language VHDL and it's application to creating hardware in FPGAs.Students will be able to develop solutions to digital design problems using reliable synchronous digital design. A modular, reusable approach is encouraged. A strong emphasis is placed on the design and implementation of working hardware implementations on FPGAs using a suite of Electronic Design Automation (EDA) software tools.

SchoolSchool Engineering&Mathematical Sciences

Credit points15

Subject Co-ordinatorJim Whittington

Available to Study Abroad StudentsYes

Subject year levelYear Level 5 - Masters

Exchange StudentsYes

Subject particulars

Subject rules

Prerequisites ELE1IEL or equivalent or Admission into SMELE

Co-requisitesN/A

Incompatible subjectsN/A

Equivalent subjectsN/A

Special conditionsN/A

Readings

Resource TypeTitleResource RequirementAuthor and YearPublisher
ReadingsCircuit Design and Simulation with VHDLRecommendedPedroni, VA 20102ND EDN, MIT PRESS
ReadingsFPGAS 101: Everything you need to know to get startedRecommendedSmith, G 2010NEWNES
ReadingsRapid prototyping of digital systems: SOPC EditionRecommendedHamblen, J, Hall, T & Furman, M 2008SPRINGER
ReadingsVHDL 101: Everything you need to know to get startedRecommendedKafig, W 2011NEWNES

Graduate capabilities & intended learning outcomes

01. Demonstrate knowledge of the hardware description language VHDL as a method for describing and simulating the operation of digital hardware.

Activities:
Lectures 2-8 cover VHDL fundamentals and techniques for application to the representation of various structures in digital circuits and systems, from a top-down or bottom up view point. The nature and operation of hardware simulation is also discussed. Lab 1 covers the hierarchical implementation of a concurrent hardware sub-system
Related graduate capabilities and elements:
Critical Thinking
Discipline-specific GCs
Inquiry/ Research
Creative Problem-solving

02. Explain the difference between simulation and synthesis, and know when and how to apply appropriate coding techniques for each situation with in the hardware design flow. Understand the nature of programmable logic technology and the synthesis process that converts VHDL code to realisable hardware.

Activities:
Lectures cover the construction of test benches and their application for effective simulation of hardware models; programmable logic technology; and how appropriate VHDL constructs can be used to realise hardware elements through the synthesis process. Practical work focuses on the implementation and testing of synchronous hardware. The first assignment requires students to demonstrate knowledge and skills covered so far through the design, development and testing development of a hardware arithmetic logic unit (ALU). Students are required to demonstrate their ALU and write a report on its development, testing and operation
Related graduate capabilities and elements:
Critical Thinking
Quantitative Literacy/ Numeracy
Creative Problem-solving
Writing
Inquiry/ Research
Discipline-specific GCs

03. Explain how electronic design automation process allows design effort to be applied at higher levels of abstraction and how various design descriptions (e.g. state machines) are realised in hardware.

Activities:
Lectures introduce the concept of design automation and a structured design flow. In practical work students explore and apply the practical application of design automation and various description methods.
Related graduate capabilities and elements:
Discipline-specific GCs
Creative Problem-solving
Critical Thinking
Inquiry/ Research

04. Demonstrate the capability to work through a complete design cycle for a digital system implemented in programmable logic, using electronic design automation tools and techniques. That is, (a) analyse a problem and specify the required outcomes; (b) produce unique design solutions using state of the art design tools; (c) undertake appropriate testing and simulation to check design integrity; (d) integrate designs into larger systems; and (e) implement a working system in hardware.

Activities:
Design is a creative process where a system of interconnected parts is defined and developed to satisfy a specified objective. There are often numerous solutions to a design problem. Attainment of a "good" solution depends on the designer's knowledge, skills, experience, creative talents & innovative flair. These attributes cannot be "taught" in the traditional sense; they must be acquired by the individual through "hands-on" practical experience & open-ended problem solving. In lectures & tutorials various design solution paths are discussed, both on the macro & micro scale. While labs emphasise practical "hands-on" experience. Assignments & project work involve the development a sequential digital system utilising EDA techniques to specify, design, test & implement the hardware system.
Related graduate capabilities and elements:
Critical Thinking
Discipline-specific GCs
Creative Problem-solving
Quantitative Literacy/ Numeracy
Inquiry/ Research
Writing

05. Write solutions to VHDL and digital design problems in written form to communicate to a professional audience.

Activities:
Assignment report requiring students to explain specific concepts in detail.
Related graduate capabilities and elements:
Writing
Inquiry/ Research

Subject options

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Start date between: and    Key dates

Melbourne, 2018, Semester 2, Day

Overview

Online enrolmentYes

Maximum enrolment sizeN/A

Enrolment information

Subject Instance Co-ordinatorJim Whittington

Class requirements

Laboratory Class Week: 31 - 43
One 3.0 hours laboratory class per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.

Lecture Week: 31 - 43
One 2.0 hours lecture per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.

Assessments

Assessment elementComments% ILO*
one 2-hour examination40 02, 01, 03, 04
Practical Work (2000 word equiv)30 01, 02, 03, 04, 05
three assignments/tests (500 word equiv each)30 03, 04, 02, 01