ele3dde electronic design automation
ELECTRONIC DESIGN AUTOMATION-TOOLS AND TECHNIQUE
ELE3DDE
2014
Credit points: 15
Subject outline
The increasing complexity of digital systems has led to development of modern methodologies in digital design, simulation and production. Collectively known as electronic design automation (EDA), key elements include graphics-based design entry and verification, hardware description languages (HDLs), application specific integrated circuits (ASICs), complex programmable logic devices (CPLDs) and field programmable gate arrays (FPGAs). This subject introduces the electronic design automation process using the current technology in graphical tools for EDA. It will show how digital systems can be described as a hierarchical structure of block diagrams, state machines, flow charts, truth tables and HDL code (VHDL). Designs can then be extensively simulated to check their integrity, and finally compiled and synthesized in a CPLD or FPGA. Hands-on practical work in laboratory classes, assignments and a team project form a major part of the learning in this unit.
FacultyFaculty of Science, Tech & Engineering
Credit points15
Subject Co-ordinatorJim Whittington
Available to Study Abroad StudentsYes
Subject year levelYear Level 3 - UG
Exchange StudentsYes
Subject particulars
Subject rules
Prerequisites ELE2DDP
Co-requisites ELE3EMB
Incompatible subjects ELE5FDD
Equivalent subjectsN/A
Special conditionsN/A
Learning resources
Readings
Resource Type | Title | Resource Requirement | Author and Year | Publisher |
---|---|---|---|---|
Readings | Advanced digital logic design: using VHDL, state machines and synthesis for FPGAs | Recommended | Lee, S 2005 | THOMSON |
Readings | Design Recipes for FPGAs | Recommended | Wilson, P 2007 | ELSEVIER |
Readings | Digital Systems Design Using VHDL | Recommended | Roth, CH, John, LK 2007 | 2ND EDN, CL-ENGINEERING |
Readings | FPGAS 101: Everything you need to know to get started | Recommended | Smith, G 2010 | NEWNES |
Readings | Introductory VHDL from simulation to synthesis | Recommended | Yalamanchili, S 2001 | PRENTICE HALL |
Readings | Rapid prototyping of digital systems: SOPC Edition | Recommended | Hamblen, J, Hall, T & Furman, M 2008 | SPRINGER |
Readings | VHDL starter's guide | Recommended | Yalamanchili, S 2005 | 2ND EDN, PRENTICE-HALL |
Subject options
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Melbourne, 2014, Semester 2, Day
Overview
Online enrolmentYes
Maximum enrolment sizeN/A
Enrolment information
Subject Instance Co-ordinatorJim Whittington
Class requirements
Laboratory ClassWeek: 31 - 43
One 3.0 hours laboratory class per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.
LectureWeek: 31 - 43
Two 1.0 hours lecture per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.
TutorialWeek: 31 - 43
One 1.0 hours tutorial per week on weekdays during the day from week 31 to week 43 and delivered via face-to-face.
Assessments
Assessment element | Comments | % |
---|---|---|
Design Project (1200 words/student) | 30 | |
one 2-hour examination | 40 | |
two assignments (600-words each) | 30 |